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DG211, DG212
Data Sheet June 1999 File Number
3118.2
SPST 4-Channel Analog Switches
The DG211 and DG212 are low cost, CMOS monolithic, Quad SPST analog switches. These can be used in general purpose switching applications for communications, instrumentation, process control and computer peripheral equipment. Both devices provide true bidirectional performance in the ON condition and will block signals to 30VP-P in the OFF condition. The DG211 and DG212 differ only in that the digital control logic is inverted, as shown in the truth table.
Features
* Switches 15V Analog Signals * TTL Compatibility * Logic Inputs Accept Negative Voltages * rON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Functional Block Diagrams
DG211
S1 IN1
Ordering Information
PART NUMBER DG211CJ DG212CJ DG211CY DG212CY TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 70 0 to 70 PACKAGE 16 Ld PDIP 16 Ld PDIP 16 Ld SOIC 16 Ld SOIC PKG. NO. E16.3 E16.3 M16.15 M16.15
D1 S2 IN2 D2 S3 IN3 D3
Pinout
DG211, DG212 (PDIP, SOIC) TOP VIEW
IN1 D1 S1 VGND S4 D4 IN4 1 2 3 4 5 6 7 8 16 IN2 15 D2 14 S2 13 V+ (SUBSTRATE) 12 VL (+5V) 11 S3 10 D3 9 IN3 IN3 IN2 IN4
S4
D4
DG212
S1 IN1 D1 S2
D2 S3
D3 S4 IN4 D4 SWITCHES SHOWN FOR LOGIC "1" INPUT
TRUTH TABLE LOGIC 0 1 DG211 ON OFF DG212 OFF ON
Logic "0" 0.8V, Logic "1" 2.4V
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
DG211, DG212 Schematic Diagram
DG211 (1/4 AS SHOWN)
TTL IN -15V
GND
+15V +5V VL -15V V-
-15V +15V IN OUT
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DG211, DG212
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ VL to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 25V VS or VD to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to -36V VS or VD to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 36V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V Current, any Terminal Except S or D . . . . . . . . . . . . . . . . . . . . 30mA Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF1 tOFF2 OFF Isolation, OIRR (Note 5)
V+ = +15V, V- = -15V, VL = +5V, GND, TA = 25oC TEST CONDITIONS (NOTE 2) MIN (NOTE 3) TYP MAX UNITS
See Figure 1 VS = 10V, RL = 1k, CL = 35pF
-
460
-
ns
VIN = 5V, RL = 1k, CL = 15pF, VS = 1VRMS , f = 100kHz VD = VS = 0V, VIN = 5V, f = 1MHz -
360 450 70 -90 5 5 16
-
ns ns dB dB pF pF pF
Crosstalk (Channel to Channel), CCRR Source OFF Capacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) Channel ON Capacitance, CD(ON) + CS(ON) DIGITAL INPUT CHARACTERISTICS Input Current with Voltage High, IIH
VIN = 2.4V VIN = 15V
-1.0 -1.0
-0.0004 0.003 -0.0004
1.0 -
A A A
Input Current with Voltage Low, IIL ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) Source OFF Leakage Current, IS(OFF)
VIN = 0V
-15 VD = 10V, VIN = 2.4V (DG212) IS = 1mA, VIN = 0.8V (DG211) VIN = 2.4V (DG211) VIN = 0.8V (DG212) VS = 14V, VD = -14V VS = -14V, VD = 14V VS = -14V, VD = 14V VS = 14V, VD = -14V -5.0 -5.0 -5.0
150 0.01 -0.02 0.01 -0.02 0.1 -0.15
15 175 5.0 5.0 5.0 -
V nA nA nA nA nA nA
Drain OFF Leakage Current, ID(OFF)
Drain ON Leakage Current, ID(ON) (Note 4)
VIN = 0.8V (DG211) VIN = 2.4V (DG212)
VS = VD = 14V VS = VD = -14V
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DG211, DG212
Electrical Specifications
PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ Negative Supply Current, ILogic Supply Current, IL NOTES: 2. The algebraic convention whereby the most negative value is a minimum, and the most positive is a maximum, is used in this data sheet. 3. For design reference only, not 100% tested. 4. ID(ON) is leakage from driver into ON switch. VS 5. OFF Isolation = 20 log ------- , V S = Input to OFF switch, V D = output . VD VIN = 0V or 2.4V 0.1 0.1 0.1 10 10 10 A A A V+ = +15V, V- = -15V, VL = +5V, GND, TA = 25oC (Continued) TEST CONDITIONS (NOTE 2) MIN (NOTE 3) TYP MAX UNITS
Test Circuits and Waveforms
Switch output waveform shown for VS = constant with logic input waveform as shown. Note the VS may be + or - as per switching time test circuit. VO is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
5V VL LOGIC INPUT (IN1) tr < 20ns tf < 20ns SWITCH V INPUT S 90% SWITCH OUTPUT (VO) 0V tOFF1 90% 10% tON tOFF2 GND SWITCH INPUT VS = 10V IN1
15V V+ SWITCH OUTPUT VO RL 1k CL 35pF
50%
S1
D1
LOGIC INPUT
V-15V RL
(REPEAT TEST FOR IN2 , IN3 AND IN4)
VO = VS
Logic shown for DG211. Invert for DG212.
FIGURE 1. SWITCHING TIME MEASUREMENT POINTS
RL + rDS(ON)
FIGURE 2. SWITCHING TIME TEST CIRCUIT
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DG211, DG212 Die Characteristics
DIE DIMENSIONS: 2159m x 2235m METALLIZATION: Type: Al Thickness: 10kA 1kA PASSIVATION: Type: PSG/Nitride PSG Thickness: 7kA 1.4kA Nitride Thickness: 8kA 1.2kA WORST CASE CURRENT DENSITY: 9.1 x 104 A/cm2
Metallization Mask Layout
DG211, DG212
PIN 1 IN 1 PIN 2 D1
PIN 16 IN 2 PIN 15 D2
PIN 3 S1
PIN 14 S2
PIN 4 V-
PIN 13 V+ (SUBSTRATE)
PIN 5 GND
PIN 12 VL
PIN 6 S4
PIN 11 S3
PIN 7 D4 PIN 8 IN 4 PIN 9 IN 3 PIN 10 D3
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DG211, DG212 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280
A
E A2 L A C L
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1
A1 A2
-C-
B B1 C D D1 E
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 16 0.430 0.150
2.54 BSC 7.62 BSC 2.93 16 10.92 3.81
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DG211, DG212 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 9.80 3.80 MAX 1.75 0.25 0.51 0.25 10.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.3859 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.3937 0.1574
A1 B C D
A1 0.10(0.004) C
E e H h L N
e
B 0.25(0.010) M C AM BS
0.050 BSC 0.2284 0.0099 0.016 16 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 16 0o 6.20 0.50 1.27
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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